1. Field of the Invention
The present invention relates to an event direction detector and its method, which are efficient for evaluating an architecture during the system level design, and to the design engineering field of semiconductor large-scale integrated circuits including microprocessors, so-called SoC (System on a Chip). In particular, the present invention relates to a modeling method of a functional block of a system and to a modeling of higher-level communication among blocks and algorithms when hardware blocks and software blocks are determined in the system architecture design stage and its cooperative development, cooperative design, and cooperative verification environments are built.
2. Description of Related Art
Conventionally, the rule or procedure for converting an algorithm to a system-level model depends on the system-level design language or simulator used for the conversion.
Patent Document 1 discloses a “reconfigurable master/slave control method and device” for reconfiguring the master/slave operation.
This document proposes a control method and a control device in which the master operation or slave operation is held as a switching value for reconfiguring a combination of the master and the slave.    [Patent Document 1] Japanese Laid-Open Patent JPH6-70574